Edge-triggered scan flip-flop and one-pass scan synthesis methodology
US6389566B1 · kind B1 · utility
36Cited by
22References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 1998 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Jun 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318541
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An improved scan flip-flop and method of using same. The scan flip-flop has a separate dedicated scan output driven by a scan output signal driver. Scan shift race conditions are minimized by providing a weak scan output signal driver and inserting delay elements within a cell for a scan flip-flop in the scan signal path. The use of the improved scan flip-flop allows for a one-pass scan synthesis process which provides accurate flip-flop cell timing and area information during the design process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.