Cleaning solutions and methods for semiconductor wafers
US6394106B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Aug 28, 2000 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Aug 28, 2020 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC11D2111/46
- WIPO fieldBasic materials chemistry
- WIPO sectorChemistry
Abstract
A mixture for cleaning slurries left on the surface of a semiconductor wafer, after a polishing step, includes a caustic, an anionic surfactant, a non-ionic surfactant, and water. The caustic provides an etch rate on the surface to be cleaned in the range of 1-100 Angstroms per minute. The ionic concentration of the caustic ranges from 0.5N to 0.000001N. The caustic etches the surface. The anionic surfactant prevents particle redeposition. The non-ionic surfactant inhibits pitting of the backside of the wafers, if they have exposed silicon or polysilicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.