Method for manufacturing integrated structures including removing a sacrificial region
US6395618B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2000 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Dec 19, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/764
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method is based on the use of an etching mask comprising silicon carbide or titanium nitride for removing a sacrificial region. In case of manufacture of integrated semiconductor material structures, the following steps are performed: forming a sacrificial region of silicon oxide on a substrate of semiconductor material; growing a pseudo-epitaxial layer; forming electronic circuit components; depositing a masking layer comprising silicon carbide or titanium nitride; defining photolithographically the masking layer so as to form an etching mask containing the topography of a microstructure to be formed; with the etching mask, forming trenches in the pseudo-epitaxial layer as far as the sacrificial region so as to laterally define the microstructure; and removing the sacrificial region through the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.