Method for forming implants in semiconductor fabrication
US6395624B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1999 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Feb 22, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/952
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a novel method of forming implants with Projection Gas-Immersion Laser Doping (PGILD) process that overcomes the disadvantages of the prior art methods. In particular, the preferred method applies a reflective coating over features before the application of the PGILD laser. The reflective coating lowers the amount of heat absorbed by the features, improving the reliability of the fabrication process. The preferred method is particularly applicable to the fabrication of field effect transistors (FETs). In this application, a gate stack is formed, and a reflective coating is over the gate stack. An anti-reflective coating (ARC) is then applied over the reflective coating. The anti-reflective coating reduces variability of the photolithographic process used to pattern the gate stack. After the gate stack is patterned, the anti-reflective coating is removed, leaving the reflective coating on the gate stack. The PGILD process can then be used to form source/drain doped regions on the transistors. The reflective coating reduces the amount of heat absorbed by the gate stack, and thus provides an improved method for fabricating transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.