Field coupled power MOSFET bus architecture using trench technology
US6396102B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 27, 1998 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Jan 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A power metal oxide semiconductor-field-effect-transistor (MOSFET) device using trench technology to achieve a reduced-mask-production process. The power MOSFET device includes a gate signal bus having multiple gate trenches formed using fewer masks than previously required for a similar device. The two-dimensional behavior of the trenches provides an advantageous field-coupling effect that suppresses hot-carrier generation without the need for the commonly used thick layer of silicon dioxide beneath the gate poly-silicon. The use of easily controlled silicon trench etching in production of the power MOSFET results in stable, low cost, and high yielding manufacturing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.