System and method for early write to memory by holding bitline at fixed potential
US6400629B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2001 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Jun 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method is disclosed for writing early within a memory cycle by holding only one of a true bitline and a reference bitline at a fixed potential, e.g. ground, when the sense amplifier is set. The sense amplifier amplifies a small voltage difference between the true bitline and the reference bitline to predetermined high and low voltage logic levels to write a datum to the memory cell. In this way, writing can complete in about the same time as reading, without risking corruption of data on adjacent bitlines in the memory. The bitlines are precharged to a fixed potential in a conduction path through the bitswitches, rather than using local precharge devices at the sense amplifier. To write, bitswitches and write path transistors apply the fixed potential to one of the true bitline and the reference bitline. Bitswitches on such other memory cells not currently being written isolate the bitline pairs coupled to those memory cells when setting the sense amplifiers, such that the stored contents of such memory cells not being written are refreshed (written back) at the time that the selected memory cell is written.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.