Method for sectioning a substrate wafer into a plurality of substrate chips
US6406979B2 · kind B2 · utility
53Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2001 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Jun 25, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/10156
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for sectioning a substrate wafer into a plurality of substrate chips enables a process management that is particularly timesaving and flexible with respect to the producible surface areas of the substrate chips. For this purpose, the substrate chips are separated from one another by a selective deep patterning method, a plasma etching method in particular.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.