Method for integrated circuit planarization
US6407006B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2000 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Apr 14, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/0002
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
An apparatus for planarizing or patterning a dielectric film on a substrate is provided. The apparatus includes a press for applying contact pressure to an operably connected compression tool. The compression tool has a working face that is planar or patterned. A controller for regulating the position, timing and force applied by the compression tool to the dielectric film is also provided. There is also provided a support, with an optional workpiece holder for supporting the substrate and dielectric film during contact with the compression tool. Methods of using the apparatus, as well as planarized and/or patterned dielectric films are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.