Semiconductor package using terminals formed on a conductive layer of a circuit board
US6410355B1 · kind B1 · utility
87Cited by
42References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 19, 2000 |
| Grant date | Jun 25, 2002 |
| Priority date | — |
| Expiry date | Jan 19, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/2018
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A small package is provided for a flash EEPROM memory. The small package uses terminals which are part of a bottom conductive layer of a circuit board. In this manner, the final package can be quite thin. The circuit board can be connected to the integrated circuits and passive devices and can be encapsulated in plastic or glued to a plastic cover. In this manner, a thin and relatively inexpensive package can be formed. Additionally, the circuit board can have testing connections which can be removed before forming the final package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.