Method for forming a contoured floating gate cell
US6413818B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1999 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Oct 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A floating gate having a first and second end region, each of which are positioned adjacent to a corresponding lateral end of the floating gate. A middle region is positioned laterally towards a middle of the floating gate relative to the first and second end regions. The first end region, the middle region and the second end region are formed of a same material during a single fabrication step, and the middle region formed has a thickness which is less than a thickness of the first or second end regions. This invention further includes a method for forming a contoured floating gate for use in a floating gate memory cell. The method includes forming a polysilicon layer over first and second spaced apart oxide structures and a floating gate region between the first and second oxide structures such that the polysilicon layer formed in the floating gate region has a first end region adjacent the first oxide structure, a second end region adjacent the second oxide structure, and a middle region positioned laterally between the first and second end regions. The method further includes removing a portion of the polysilicon layer in the floating gate region such that the vertical thicknes…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.