Method of manufacturing electronic components
US6413878B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2000 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Apr 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing electronic components includes disposing a top metal layer (502) comprised of solder over a bottom metal layer (201, 202) comprised of titanium or tungsten, and selectively etching the bottom metal layer (201, 202) over the top metal layer (502) with an etchant mixture (601) comprised of an etchant, an additive to control the temperature of the etchant mixture (601), and another additive to reduce the redeposition of the top layer (502).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.