TFT with partially depleted body
US6414353B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1999 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Mar 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6743
Abstract
An SOI layer is formed so thick that a body region is not fully depleted under conditions of floating and a zero potential. When a MOSFET operates, a negative body potential is applied to the body region through a body electrode. Thus, the body region is fully depleted. The MOSFET is formed equivalently to a conventional MOSFET of a PD mode as to the thickness of the SOI layer, and is equivalent to a MOSFET of an FD mode as to its operation. Therefore, both of advantages of a PD mode MOSFET such as low resistance in source/drain regions, easiness in formation of a contact hole for a main electrode and stability of a silicide layer and an advantage of an FD mode MOSFET such as excellent switching characteristics are compatibly implemented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.