System and method for on-chip communication
US6415344B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1999 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Apr 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for communication between a CPU and on-chip modules in an integrated circuit and off-chip devices is disclosed. A path on the integrated circuit allows for packet traffic to flow between the CPU and modules. In some embodiments the path is a data bus. Various types of packets are used, but each include a destination indicator to indicate the required destination device connected to the path. Data transfer packets are used for memory access operations. Normal event packets form prioritized interrupts wherein the recipient CPU or module respond to the event packet depending on relative priorities associated with other packets sent to the recipient device. Special event packets form command control signals that must be acted on by the recipient device when the special event packet is received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.