Patent · US Expired

Integrated circuit having a self-test device and method for producing the integrated circuit

US6415406B1 · kind B1 · utility

10Cited by

8References

9Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Robert Kaiser · Kaufering, DE
Hans-Jürgen Krasser · Hersbruck, DE
Florian Schamberger · Bad Reichenhall, DE

Key dates

Filing date	Aug 4, 1999
Grant date	Jul 2, 2002
Priority date	—
Expiry date	Aug 4, 2019

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/14
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit incorporating a self-test device and a method for producing a self-testing integrated circuit. The integrated circuit has a program memory with at least one external terminal for loading external test programs. The integrated circuit has a self-test device connected to the program memory, the self-test device executing program commands of a test program loaded into the program memory, the program commands succeeding one another in address terms, for carrying out a self-test of the circuit. The self-test device has an interrupt signal input, through which the self-test device interrupts the test program that is currently being executed by not executing the respective succeeding program command in address terms. Rather, it executes a program jump within the test program, the program jump being triggered by the interrupt signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.