Method of manufacturing microdevice utilizing combined alignment mark
US6416912B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2000 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Oct 27, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F9/7076
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An exposure apparatus for accurately and quickly transferring mask patterns to a substrate on which a plurality of pattern layers are formed, and a method of manufacturing microdevices that uses the exposure apparatus. A wafer mark (or substitute wafer mark ) of a gate electrode layer and a wafer mark of a second interlayer insulating layer are formed on a street line of a wafer. Mark bars WMnm (n=1, 2, M−1 to 4) of the wafer marks are alternately arranged, and combined marks are formed. The combined marks are simultaneously detected with an alignment system, and positional information of the wafer marks is computed based on the detection results. Then, the circuit patterns on a reticle are aligned with a shot region on the wafer based on the computed positional information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.