Efficient method for modeling three-dimensional interconnect structures for frequency-dependent crosstalk simulation
US6418401B1 · kind B1 · utility
11Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 1999 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Feb 11, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reducing the computation time and improving the productivity in designing high-performance microprocessor chips that have no failures—due to crosstalk noise. The technique allows a very fast calculation of tables of frequency-dependent circuit parameters needed for accurate crosstalk prediction on lossy on-chip interconnections. These tables of parameters are the basis for CAD tools that perform crosstalk checking on >10K critical nets on typical microprocessor chips. A fast table generation allows for rapid incorporation of design or processing changes and transition to more advanced technologies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.