Patent · US Expired

Direct memory access controller and method therefor

US6418489B1 · kind B1 · utility

34Cited by
7References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 18, 2000
Grant dateJul 9, 2002
Priority date
Expiry dateJan 18, 2020

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/28
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Direct memory access controller (DMA) (2) adapted to directly execute C language style FOR tasks, where the FOR task includes a movement of a data element from a first location to a second location in memory, and the movement is controlled by a master DMA engine (MDE) (6). A master DMA engine (MDE) (6) includes a top level state machine (52) to coordinate a context save state machine (54), a parse state machine (56), and a running state machine (58). An loop control descriptor (LCD) queue (74) and a data routing descriptor (DRD) cache store information. The LCD queue allows pipelining of descriptor parsing, while the DRD cache avoids refetching of DRDs on reentry of loops.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.