Robert B. Cohen
14Patents
7h-index
32Co-inventors
66Inventor score
Filing activity: Jan 2, 1986 → Dec 19, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6418489B1 | Direct memory access controller and method therefor | Physics | 34 | Expired |
| US5115506A | Method and apparatus for preventing recursion jeopardy | Physics | 23 | Expired |
| US4727485A | Paged memory management unit which locks translators in translation cache if lock specified in translation table | Physics | 17 | Expired |
| US6233659A | Multi-port memory device with multiple modes of operation and improved expansion characteristics | Physics | 13 | Expired |
| US5220526A | Method and apparatus for indicating a duplication of entries in a content addressable storage device | Physics | 11 | Expired |
| US6625699B2 | Multi-port memory device with multiple modes of operation and improved expansion characteristics | Physics | 10 | Expired |
| US7913261B2 | Application-specific information-processing method, system, and apparatus | Physics | 10 | Expired |
| US11579884B2 | Instruction address translation and caching for primary and alternate branch prediction paths | Physics | 6 | Active |
| US5048214A | Revolver grip with cartridge storage | Mechanical Engineering; Lighting; Heating | 5 | Expired |
| US6950911B2 | Multi-port memory device with multiple modes of operation and improved expansion characteristics | Physics | 3 | Expired |
| US12039337B2 | Processor with multiple fetch and decode pipelines | Physics | 0 | Active |
| US12153927B2 | Merged branch target buffer entries | Physics | 0 | Active |
| US11907126B2 | Processor with multiple op cache pipelines | Physics | 0 | Active |
| US12222797B2 | Dynamic configuration of processor sub-components | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.