Semiconductor device and method of fabricating the same
US6420197B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2000 |
| Grant date | Jul 16, 2002 |
| Priority date | — |
| Expiry date | Feb 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/018
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a substrate having a first thermal expansion coefficient T1, a strain reducing layer formed on the substrate and having a second thermal expansion coefficient T2, and a semiconductor layer formed on the strain reducing layer, having a third thermal expansion coefficient T3, and made of a nitride compound represented by AlyGa1−y−zInzN (0≦y≦1, 0≦z ≦1). The second thermal expansion coefficient T2 is lower than the first thermal expansion coefficient T1. The third thermal expansion coefficient T3 is lower than the first thermal expansion coefficient T1 and higher than the second thermal expansion coefficient T2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.