High k dielectric material with low k dielectric sheathed signal vias
US6430030B2 · kind B2 · utility
22Cited by
2References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2001 |
| Grant date | Aug 6, 2002 |
| Priority date | — |
| Expiry date | Jan 26, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/107
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-layer ceramic capacitor and method of manufacturing the capacitor, the capacitor having signal vias surrounded by an area containing a material having a low dielectric constant, the via and surrounding area of low dielectric constant material inserted in a material having a high dielectric constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.