Method and apparatus for reducing process-induced charge buildup
US6432726B1 · kind B1 · utility
8Cited by
10References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 31, 1997 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Mar 31, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/611
Abstract
Method and apparatus are disclosed for protection of a circuit against process-induced electrical discharge. The method includes forming a diode in close proximity to a charge collector structure capable of exhibiting the antenna effect, and connecting the diode to the charge collector structure by means of local interconnect techniques during intermediate processing steps. Additionally, the diode may be formed beneath a connecting pad to reduce or eliminate antenna effect problems without significant loss of die area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.