Process for making planarized silicon fin device

US6432829B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• K. Paul Muller · Wappingers Falls, US
• Edward J. Nowak · South Burlington, US
• Hon-Sum Philip Wong · Chappaqua, US

Key dates

• Filing date: Mar 8, 2001
• Grant date: Aug 13, 2002
• Expiry date: Mar 8, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6744

Abstract

An improved fin device used as the body of a field effect transistor (“FET”) and an improved process of making the fin device. The fin device allows for the fabrication of very small dimensioned metal-oxide semiconductor (“MOS”) FETs in the size range of micrometers to nanometers, while avoiding the typical short channel effects often associated with MOSFETs of these dimensions. Accordingly, higher density MOSFETs may be fabricated such that more devices may be placed on a single semiconductor wafer. The process of making the fin device results in an improved fully planarized device.