Memory cell with a stacked capacitor

US6437387B1 · kind B1 · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventor

• Martin Gutsche · Dorfen, DE

Key dates

• Filing date: Jan 31, 2001
• Grant date: Aug 20, 2002
• Expiry date: Jan 31, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/033

Abstract

A semiconductor memory cell includes a field effect transistor coupled to a storage capacitor that formed as a multilayer stack over the surface of the silicon chip of the cell. The capacitor is formed by three conformal layers over the surface of a cup-shaped contact hole in a silicon oxide layer overlying the surface of the chip.