Capacitor for semiconductor devices
US6437391B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 16, 2000 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Mar 16, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a capacitor for semiconductor devices which prevents the resistance between a lower electrode and a plug therein from increasing due to oxidation. The present invention includes a semiconductor substrate, an insulating interlayer (having an elevated region) on the semiconductor substrate wherein a contact hole is formed in the elevated region of the insulating interlayer, a plug filling up the contact hole so as to be in contact with the semiconductor substrate, an adhesive layer on the insulating interlayer and in contacted with the plug, a first barrier layer on a top surface of the adhesive layer and a second barrier layer at sides of the elevated region of the adhesive layer, a first lower electrode on the first barrier layer, a second lower electrode at sides of the first and second barrier layers and the insulating interlayer, a dielectric layer on the first and second lower electrodes, and an upper electrode on the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.