Semiconductor package with metal pads
US6437429B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2001 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | May 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18301
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is disclosed, such as QFN, SON. The semiconductor package includes a die, a package body for protection of a die, and a plurality of leads. A metal pad formed by some partial downside surface of each lead is located on a downside surface of the package body with coplanarity. Each lead has a cutting surface exposed on a corresponding lateral surface of the package body. The cutting surface has an interval with the plane of forming the metal pads by means of selectively self-etching the leads or stamping to bend the leads in order to avoid forming a cutting sharp edge in the brim of the metal pad after cutting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.