High voltage level shifter for switching high voltage in non-volatile memory intergrated circuits
US6437627B1 · kind B1 · utility
26Cited by
4References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 25, 1995 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Aug 25, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356147
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high voltage level shifter utilizing only low voltage PMOS and low voltage NMOS devices. The high voltage level shifter is used to distribute the high voltage almost equally among the PMOS devices and almost equally among the NMOS devices to meet the device electrical specification of low voltage MOS devices for various breakdown mechanisms. A layout technique is also used to achieve a much higher junction breakdown of N+ drain to P-substrate and a better gated diode breakdown of NMOS devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.