Circuit and method for improving memory integrity in a microprocessor based application
US6438710B1 · kind B1 · utility
2Cited by
11References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1999 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Aug 31, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M3/523
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor based system such as an automatic call distributor having a reset circuit to improve memory integrity of electronic memory is disclosed. The reset circuit includes a reset controller which receives an external reset signal that can be generated from a number of different sources. The external resent signal is synchronized with activity on a bus to produce an internal reset signal which is applied to the microprocessor to reset it after all pending requests for bus access are completed. The microprocessor is then reset, thus improving integrity of electronic memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.