Method for constructing a wafer interposer by using conductive columns
US6440771B1 · kind B1 · utility
18Cited by
2References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2001 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Mar 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention provides a method and apparatus for testing wafers that is simple and allows testing prior to dicing so that the need to temporarily package individual dies for testing is eliminated. As a result, the number of manufacturing steps is reduced, thus increasing first pass yields. In addition, manufacturing time is decreased, thereby improving cycle times and avoiding additional costs. The invention also provides for packaging of the die at the completion of testing. One form of the present invention provides an interposer substrate connected to a wafer through conductive columns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.