Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme
US6440811B1 · kind B1 · utility
6Cited by
10References
18Claims
0Family size
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Key dates
| Filing date | Dec 21, 2000 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Dec 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/403
Abstract
A method for fabricating a poly-poly capacitor integrated with a BiCMOS process which includes forming a lower plate electrode of a poly-poly capacitor during deposition of a gate electrode of a CMOS transistor; and forming an upper SiGe plate electrode during growth of a SiGe base region of a heterojunction bipolar transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.