Semiconductor device and circuit having low tolerance to ionizing radiation
US6441440B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2000 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Jun 9, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0156
Abstract
Semiconductor devices and integrated circuits that benefit from the advantages of contemporary processing technologies yet are irreparably damaged by ionizing radiation, and methods for making the same. Transistors that are particularly intolerant to ionizing radiation have a gate insulator that includes a portion of a screen layer that is used in conjunction with N- and P-well implantation. After the implantation step, the screen layer exhibits significantly degraded tolerance to ionizing radiation, so that a gate insulator incorporating a portion of such a screen layer will likewise be radiation intolerant. By selectively removing portions of the screen layer, a method is provided for co-locating radiation-tolerant and radiation-intolerant transistors on a substrate. A radiation intolerant integrated circuit is formed by adding “safeguard devices” to an integrated circuit. The safeguard devices are susceptible to relatively low doses of ionizing radiation while other “utile devices” on the integrated circuit are not. The safeguard devices are coupled to the utile devices in such a manner that when the integrated circuit is bombarded with ionizing radiation…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.