Non-volatile memory with functional capability of burst mode read and page mode read during suspension of an operation of electrical alteration
US6442068B1 · kind B1 · utility
40Cited by
2References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2000 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Sep 13, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically alterable semiconductor memory includes at least two memory sectors the content of which is individually alterable, and a control circuit for controlling operations of electrical alteration of the content of the memory, permitting the selective execution of an operation of electrical alteration of the content of one of the memory sectors with the possibility of suspending the execution to permit read access to the other of the memory sectors. The control circuit is also capable of permitting, during the suspension, an operation of burst mode or page mode reading of the content of the other memory sector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.