Simone Bartoli
44Patents
11h-index
42Co-inventors
75Inventor score
Filing activity: Dec 30, 1996 → Apr 18, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6724241B1 | Variable charge pump circuit with dynamic load | Electricity | 59 | Expired |
| US6442068B1 | Non-volatile memory with functional capability of burst mode read and page mode read during suspension of an operation of electrical alteration | Physics | 40 | Expired |
| US6385107B1 | Architecture for handling internal voltages in a non-volatile memory, particularly in a single-voltage supply type of dual-work flash memory | Physics | 36 | Expired |
| US6804148B2 | Flash memory architecture with page mode erase using NMOS and PMOS row decoding scheme | Physics | 32 | Expired |
| US7684245B2 | Non-volatile memory array architecture with joined word lines | Emerging Cross-Sectional Technologies | 26 | Active |
| US6912598B1 | Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read | Physics | 23 | Expired |
| US7249215B2 | System for configuring parameters for a flash memory | Physics | 21 | Active |
| US6401164B1 | Sectored semiconductor memory device with configurable memory sector addresses | Physics | 17 | Expired |
| US6480436B2 | Non-volatile memory with a charge pump with regulated voltage | Physics | 16 | Expired |
| US7181565B2 | Method and system for configuring parameters for flash memory | Physics | 15 | Expired |
| US5822247A | Device for generating and regulating a gate voltage in a non-volatile memory | Physics | 13 | Expired |
| US7158415B2 | System for performing fast testing during flash reference cell setting | Physics | 11 | Expired |
| US6195290A | Method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor non-volatile storage device | Physics | 10 | Expired |
| US6624683B1 | Threshold voltage reduction of a transistor connected as a diode | Electricity | 9 | Expired |
| US7414891B2 | Erase verify method for NAND-type flash memories | Physics | 8 | Active |
| US6349059B1 | Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit | Physics | 7 | Expired |
| US7184311B2 | Method and system for regulating a program voltage value during multilevel memory device programming | Physics | 6 | Expired |
| US6040734A | Supply voltages switch circuit | Electricity | 6 | Expired |
| US7283396B2 | System and method for matching resistance in a non-volatile memory | Physics | 5 | Expired |
| US7782695B2 | Compensated current offset in a sensing circuit | Physics | 5 | Active |
| US6353350B1 | Pulse generator independent of supply voltage | Physics | 5 | Expired |
| US8995192B2 | Method of programming selection transistors for NAND flash memory | Physics | 4 | Active |
| US6854040B1 | Non-volatile memory device with burst mode reading and corresponding reading method | Physics | 4 | Expired |
| US6320361A | Buffer device with dual supply voltage for low supply voltage applications | Physics | 4 | Expired |
| US5994948A | CMOS twin-tub negative voltage switching architecture | Physics | 4 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.