Apparatus and method in a network switch for swapping memory access slots between gigabit port and expansion port
US6442137B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 1999 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | May 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/352
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that allocates a prescribed number of external memory bandwidth slots between high data rate ports based on the compared amount of network traffic on the respective ports. A scheduler within an external memory interface initially assigns memory access slots to the respective high data rate ports according to a prescribed sequence. If the scheduler subsequently detects that the network data traffic on a port having less slots is higher than the traffic on a port having more slots, the slots are swapped between the high data rate ports. Additionally, a clock multiplexer in one of the high data rate ports adjusts the data rate of the port dependent upon the number of slots assigned to that port. The swapping of bandwidth slots between the high data rate ports along with the adjustment of the port clock rate enables the efficient use of limited memory bandwidth resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.