Patent · US Expired

Integrated circuit and method

US6444542B2 · kind B2 · utility

30Cited by
5References
2Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 3, 2001
Grant dateSep 3, 2002
Priority date
Expiry dateApr 3, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/31144
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.