Method for forming stepped contact hole for semiconductor devices
US6444574B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 6, 2001 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | Sep 6, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76829
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a contact hole having a stepped sidewall is disclosed. First, a capping layer is formed on a semiconductor substrate, and then, a first dielectric layer and a second dielectric layer having different etch rates are formed on the capping layer. A preliminary contact hole is anisotropically etched through the layers, and part of the way through the substrate. After this, the sidewalls of the preliminary contact hole are isotropically etched with an etching agent having a higher etch rate for the second dielectric layer than for the first dielectric layer, thereby forming a step sidewall. Finally, the exposed portions of the capping layer are removed to complete the contact hole fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.