Carrier including a multi-volume diaphragm for polishing a semiconductor wafer and a method therefor
US6447379B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2000 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Mar 31, 2020 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/30
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
The present invention delineates a carrier for an apparatus (10) which polishes a surface of a semiconductor wafer (56, 124). In a preferred embodiment, the carrier includes a rigid plate (34) connected to one or more diaphragms (40, 42) of soft, flexible material that provide pressurizable cavities (50, 52) having respective surfaces for contacting the back surface of the wafer. A plurality of conduits (28a, 28c) are used to selectively pressurize the diaphragm cavities. The carrier head may also include an inter-diaphragm cavity (54) formed between a portion of one diaphragm, a portion of another diaphragm, and the semiconductor wafer. The inter-diaphragm cavity is provided with its own conduit (28b) by which a source of pressurized fluid and a source of vacuum are selectively connected to the inter-diaphragm cavity. During operation, pressure and/or vacuum may be applied through one or more cavities to chuck (90) a wafer, and to pressurize (96) the cavities during polishing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.