Single event upset immune oscillator circuit
US6448862B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2000 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Sep 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/03
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single event effect immune oscillator circuit is disclosed. The single event upset immune oscillator circuit includes an odd number of logic circuit blocks connecting in series to provide a continuous pulse signal at an output of the oscillator circuit. Each logic circuit block has a first input, a second input, and an output. For a series of logic circuit blocks i, where i=1 to n (n is an odd number), the output of a logic circuit block i is connected to a first input of a logic circuit block i+1. The output of the logic circuit block i is also connected to a first input of a logic circuit block i+x, wherein x is an odd number greater than one and less than or equal to n.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.