Joseph W. Yoder
8Patents
5h-index
15Co-inventors
56Inventor score
Filing activity: Dec 17, 1984 → Sep 26, 2003
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6629276B1 | Method and apparatus for a scannable hybrid flip flop | Electricity | 14 | Expired |
| US4852061A | High density, high performance register file having improved clocking means | Physics | 14 | Expired |
| US4768167A | High speed CMOS latch with alternate data storage and test functions | Electricity | 10 | Expired |
| US6392474B1 | Circuit for filtering single event effect (see) induced glitches | Electricity | 8 | Expired |
| US7013441B2 | Method for modeling integrated circuit yield | Physics | 6 | Expired |
| US6456138B1 | Method and apparatus for a single upset (SEU) tolerant clock splitter | Electricity | 5 | Expired |
| US6448862B1 | Single event upset immune oscillator circuit | Electricity | 4 | Expired |
| US4621345A | Soft error protection circuit for a storage cell | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.