Patent · US Expired

Enhancement mode device

US6452221B1 · kind B1 · utility

12Cited by
8References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 21, 2000
Grant dateSep 17, 2002
Priority date
Expiry dateSep 21, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/4755

Abstract

An enhancement mode FET device (10) that employs a strained N-doped InAlAs charge shield layer (22) disposed on an intrinsic InAlAs barrier layer (20). A gate metal electrode (38) of the FET device (10) is controllably diffused through a recess (36) into the shield layer (22) to the barrier layer (20). The resulting enhancement mode device (10) provides an excellent Schottky barrier with a high barrier height that inhibits undesirable surface depletion effects through charge shielding by the shield layer (22) in the regions between the recess edge and the gate metal. Minimizing surface depletion effects makes the device more robust by making the surface less sensitive to processing conditions and long-term operation effects.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.