High performance network interface
US6453360B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1999 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Mar 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/26
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A high performance network interface is provided for receiving a packet from a network and transferring it to a host computer system. A header portion of a received packet is parsed by a parser module to determine the packet's compatibility with, or conformance to, one or more pre-selected protocols. If compatible, a number of processing functions may be performed to increase the efficiency with which the packet is handled. In one function, a re-assembly engine re-assembles, in a re-assembly buffer, data portions of multiple packets in a single communication flow or connection. Header portions of such packets are stored in a header buffer. An incompatible packet may be stored in another buffer. In another function, a packet batching module determines when multiple packets in one flow are transferred to the host computer system, so that their header portions are processed collectively rather than being interspersed with headers of other flows' packets. In yet another function, the processing of packets through their protocol stacks is distributed among multiple processors by a load distributor, based on their communication flows. A flow database is maintained by a flow database mana…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.