Method and apparatus for handling data errors in a computer system
US6453427B2 · kind B2 · utility
8Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1998 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Dec 31, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1044
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An uncorrectable error is detected in the data of a computer system. The erroneous data is allowed to be stored in first and second caches of the computer system while the system runs first and second processes, the first process being associated with the data. The first process is terminated when an attempt is made to load the data from the cache. Meanwhile, the second process continues to run.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.