System and method for interactive implementation and testing of logic cores on a programmable logic device
US6453456B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 22, 2000 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Mar 22, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for developing a circuit design for a programmable logic device. A tool is provided for interactively modifying a configuration bitstream, downloading the bitstream to a programmable logic device (PLD), and reading back and displaying state information from the PLD. In one embodiment, the tool is command driven. Responsive to a first command, the tool implements a selected logic core from a library of run-time parameterizable logic cores in a configuration bitstream. The bitstream can be automatically downloaded to the PLD as part of the first command, or alternatively, using a separate command. A second command is available for applying a clock signal to the PLD. After application of the clock signal, the states of selected elements implemented by the logic core are reported.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.