Method of filling plated through holes
US6453549B1 · kind B1 · utility
37Cited by
13References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 1999 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Dec 13, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for conductively filling a hole or via disposed in an electronic package to provide a structure having a lower coefficient of thermal expansion. After fabricating a through hole or a plated through hole in an electronic package, the hole or via is filled with metal, and the surface of the electronic package is sealed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.