Methods and apparatus for manufacturing ball grid array semiconductor device packages
US6455350B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Sep 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a ball grid array semiconductor package includes the step of providing a substrate (103) having a first surface (103b) and a second surface (103a), in which the first surface (103b) or the second surface (103a) include a conductor pattern (104). The method also includes the step of disposing a plurality of conductive bumps (107) on the first surface (103b) of the substrate (103) and attaching a semiconductor die (102) to the second surface (103a) of the substrate (103). The method further includes the step of electrically connecting the conductive bumps (107) to the conductor pattern (104), such that electrically connecting the conductive bumps (107) to the conductor pattern (104) mechanically affixes the conductive bumps (107) to the first surface (103b) of the substrate (103). The method also includes the steps of mechanically testing the ball grid array semiconductor package (100) to determine whether a height of the conductive bumps (107) are substantially uniform, and planarizing the conductive bumps (107) when the height of the conductive bumps are non-uniform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.