Apparatus for reducing power supply noise in an integrated circuit
US6456103B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Oct 30, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31721
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A main power supply continuously provides a current to a power input terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases during state changes in synchronous logic circuits implemented within the DUT. To limit variation (noise) in voltage at the power input terminal arising from these temporary increases in current demand, a charged capacitor is connected to the power input terminal during each DUT state change. The capacitor discharges into the power input terminal to supply additional current to meet the DUT's increased demand. Following each DUT state change the capacitor is disconnected from the power input terminal and charged to a level sufficient to meet a predicted increase in current demand during a next DUT state change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.