Selective operation of a multi-state non-volatile memory system in a binary mode
US6456528B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 17, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Sep 17, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two states instead. The two states are selected to be the furthest separated of the multiple states, thereby providing an increased margin during two state operation. This allows faster programming and a longer operational life of the memory cells being operated in two states when it is more desirable to have these advantages than the increased density of data storage that multi-state operation provides.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.