Voltage regulator for memory device
US6456557B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Aug 28, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0491
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a voltage regulator that compensates for resistance variations in the bit line control (multiplexing) circuit used to access the memory cells by including in its feedback path an emulated multiplexing circuit having an identical resistance to that of the multiplexing circuit. The voltage regulator also includes a differential amplifier, a pull-up transistor for generating a reference voltage, and a first clamp transistor controlled by the reference voltage to pass a desired voltage level to the multiplexing circuit. The feedback path incorporates the emulator circuit between a second clamp transistor and a voltage divider. Because the emulation and multiplexing circuits have the same resistance, the voltage passed to the voltage divider is essentially identical to the voltage passed by the multiplexing circuit to a selected memory cell, thereby allowing the voltage regulator to produce an optimal voltage level at the selected memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.