Method for fabricating a semiconductor memory device having silicon-on-insulator (SOI) structure
US6458638B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 23, 2001 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Aug 23, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/928
Abstract
A method for fabricating a SOI semiconductor device including providing a semiconductor substrate; forming a device isolation layer in and on a first surface of the semiconductor substrate to define an active region, including a source/drain region, and an inactive region; forming a first gate electrode on the first surface of the substrate; forming a first insulating layer on the first gate electrode; forming a capacitor, electrically connected to the source/drain region, on the first insulating layer; forming a second insulating layer on the capacitor; forming a third insulating layer on the second surface of the substrate; forming a body contact conductor line, electrically connected to the active region of substrate, on and through the third insulating layer; forming a fourth insulating layer on the body contact conductor line; and forming a bit line on the fourth insulating layer to be electrically connected to the source/drain region of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.