Semiconductor device having a chip, reinforcing plate, and sealing material sharing a common rear surface
US6459152B1 · kind B1 · utility
45Cited by
12References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2000 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Mar 8, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A plurality of chips are mounted on a substrate, coupling portions between the chips and the substrate are sealed, the chips have rear surfaces thereof collectively polished, and the substrate with the chips thereon are separated into independent semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.