Method and apparatus for port vector determination at egress
US6460088B1 · kind B1 · utility
96Cited by
6References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 21, 1999 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | May 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/351
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated multiport switch operating in a packet switched network provides the capability to alter VLAN tags on a port by port basis. An internal rules checker (IRC) employs a modular architecture that enables data frames to be processed simultaneously and increase data throughput. The IRC further generates a port vector, and thereby, outputs a forwarding descriptor that instructs Port Vector FIFO logic (PVF) on how to process the data frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.